Embodiments of the inventive concept relate generally to the testing of semiconductor devices. More particularly, the inventive concept relates to the simultaneous, yet individually tailored, testing of a plurality of memory chips using stress tests respectively associated with corresponding failure attributes.
Many different failure attributes may afflict contemporary memory chips. Yet, memory chips must be tested in an efficient manner that does not overly stress the subject memory chips. As the type and number of failure attributes increases it becomes harder and harder to efficiently test memory chips without overly stressing them.